On Packet Switches with Infinite Storage
نویسندگان
چکیده
منابع مشابه
On Packet Switches With Infinite Storage
Most prior work on congestion in datagram systems focuses on buffer management. We find it illuminating to consider the case of a packet switch with infinite storage. Such a packet switch can never run out of buffers. It can, however, still become congested. The meaning of congestion in an infinite-storage system is explored. We demonstrate the unexpected result that a datagram network with inf...
متن کاملOn scheduling optical packet switches with reconfiguration delay
Using optical technology for the design of packet switches/routers offers several advantages such as scalability, high bandwidth, power consumption, and cost. However, reconfiguring the optical fabric of these switches requires significant time under current technology (microelectromechanical system mirrors, tunable elements, bubble switches, etc.). As a result, conventional slot-by-slot schedu...
متن کاملMaking Parallel Packet Switches Practical
A parallel packet switch (PPS) is a switch in which the memories run slower than the line rate. Arriving packets are spread (or load-balanced) packet-by-packet over multiple slower-speed packet switches. It is already known that with a speedup of , a PPS can theoretically mimic a FCFS output-queued (OQ) switch. However, the theory relies on a centralized packet scheduling algorithm that is esse...
متن کاملOn the Modeling of Voice Packet Loss in FIFO Switches
In this talk, we propose the average renewal cycle (ARC) model to estimate packet loss probability for on-oo traac sources in a statistically mul-tiplexed rst-in-rst-out (SMF) switch. SMF is a widely adopted architecture for switches, routers, and many other types of communications devices. In ARC, a worst case scenario on the cell loss process is derived for aggregated traac states, so that we...
متن کاملPacket-Mode Scheduling with Proportional Fairness for Input-Queued Switches
Input-queued switches are able to overcome head-of-line (HOL) blocking and achieve high throughput by using virtual output queueing (VOQ) and efficient scheduling algorithms. In this case, the buffers and control logic work at the line speed [2], which enables such architecture to be scaled up to backbone routers with very high speed, as realized in Tiny Tera [3], Cisco GSR [4], Lucent GRF [5],...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: IEEE Transactions on Communications
سال: 1987
ISSN: 0090-6778
DOI: 10.1109/tcom.1987.1096782